We developped and make available 2 boards which allows testing and developping with the PicoTDC. Those boards are based on the VITA-57 standard (or FMC) which is widely used on the latest Xilinx FPGA evaluation boards. To complete the setup you need :

• an ultra low-jitter 40 MHz differential clock. It can come from an instrument or from a PLL chip evaluation board like the Si5341 from Skyworks.
• a FMC carrier - typically a FPGA evaluation board with at least 1 FMC connector which supports 1.2V signalling (defined as VADJ). CERN uses Xilinx VC-707 but other boards may work.
• a PC running Linux OS with a free ethernet port. CERN supports CentOS7 or AlmaLinux 9.

All documents and the hardware manual are in the CERNBox Folder ( link on the Ressource page)

FMC Fanout project (EDA-04185-V2-0)

Full design is available on EDMS, a local copy is on the CERNBox.

PicoTDC demo board project (EDA-04186-V2)

The board has two versions EDA-04186-V2-0 and EDA-04186-V2-1 which include onboard digital power measurement of the PicoTDC.
We provided the version without the power measurement IC since it was difficult to source in medium quantities. Full design is available on EDMS, a local copy is on the CERNBox.

A pin mapping fo J1 FMC connector is also provided.

v2.0 Known Issues :

• Legend text for LD3 and LD4 are inverted on schematic (page 5) and PCB (silkcreen TOP).
• Layout issue which prevents the use of the external trigger from FMC1. See the details in PDF document in the CERNBox folder .

Make sure you use the latest boards versions (v2.x) as the first release (v1) pre 2021 was designed for the prototype package and contains bugs.

Firmware & Software

FPGA firmware targetting the VC707 and PC software are in the same GitLab repository.
The Xilinx VC707 FPGA binaries files are in CERNBox.